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MAX17021 Evaluation Kit
There are two methods to create an output-voltage
transition. Select D0–D6 (SW1). Then either manually
change the SW1 settings to a new VID code setting
(Table 2), or disable all SW1 settings and drive the
VID0–VID6 PCB test points externally to the desired
code settings.
Load-Transient Experiment
One interesting experiment is to subject the output to
large, fast load transients and observe the output with
an oscilloscope. Accurate measurement of output rip-
ple and load-transient response invariably requires that
ground clip leads be completely avoided and the
probe removed to expose the GND shield, so the probe
can be directly grounded with as short a wire as possi-
ble to the board. Otherwise, EMI and noise pickup cor-
rupt the waveforms.
Most benchtop electronic loads intended for power-
supply testing lack the ability to subject the DC-DC
converter to ultra-fast load transients. Emulating the
supply current (di/dt) at the IMVP-6.5+ VCORE pins
requires at least 500A/μs load transients. An easy
method for generating such an abusive load transient is
to install a power MOSFET at the N7 location and install
resistor R20 between 5m ? and 10m ? to monitor the
transient current. Then drive its gate (TP1) with a strong
pulse generator at a low-duty cycle (< 5%) to minimize
Table 3. Shutdown Mode ( SHDN )
heat stress in the MOSFET. Vary the high-level output
voltage of the pulse generator to vary the load current.
To determine the load current, you might expect to
insert a meter in the load path, but this method is pro-
hibited here by the need for low resistance and induc-
tance in the path of the dummy-load MOSFET. To
determine how much load current a particular pulse-
generator amplitude is causing, observe the current
through inductor L1. In the buck topology, the load cur-
rent is approximately equal to the average value of the
inductor current.
Note: The CPU socket is based on the Montevina plat-
form pin configuration.
Switch SW2 Settings
Shutdown SW2 (1, 10)
When SHDN goes low (SW2 (1, 10) = on), the
MAX17021 enters low-power shutdown mode. PWRGD
is pulled low immediately and the output voltage ramps
down at 1/8 the slew rate set by R2 and R3 (71.1k ? ).
When the controller reaches the 0V target, the drivers are
disabled (DL1 and DL2 driven low), the reference is
turned off, and the IC supply currents drop to 1μA (max).
When a fault condition activates the shutdown
sequence (output undervoltage lockout or thermal shut-
SW2 (1, 10)
Off*
On
SHDN PIN
Connected to VDD
Connected to GND
MAX17021 OUTPUT
Output enabled—V OUT is selected by VID DAC code (D0 –D6) settings
Shutdown mode, V OUT = 0V
*Default position.
Table 4. DPRSLPVR, PSI
DPRSLPVR
SW2 (2, 9)
On (VDD)
Off (GND)
Off (GND)*
PSI
SW2 (3, 8)
X
On (GND)
Off (VDD)*
POWER LEVEL
Low current
Intermediate
Full
OPERATING MODE
1-phase pulse-skipping mode
1-phase forced-PWM mode
Normal operation—all phases are active, forced-PWM mode
*Default position.
X = Don’t care.
Table 5. DPRSTP
SW2 (5, 6)
Off
On*
*Default position.
DPRSTP PIN
Connected to VDD
Connected to GND
MAX17021
1/4 of nominal slew rate is set by R2 and R3 if DPRSLPVR is also high
Nominal slew rate
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